Dial controlled auxiliary plugboard panel



April 2, 1968 n. o. NEDDENRIEP 3,376,553

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DIAL CONTROLLED AUXILIARY PLUGBOARD PANEL Filed April 5. 1965 5Sheets-Sheet 3 FIG. 2b

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DIAL CONTROLLED AUXILIARY PLUGBOARD PANEL Filed April 1965 5Sheets-'Sheet 4 2l II SECONDARY 2l 2 5 2i l il l PRIMARY INPIII INPIII s2 R 5 4 o F l G 30 sI s2 sa c P3 P2 PI F G 3 b 91 Y P 2152 51 *P P I 4 oSECONDARY 2 7 2 5 2 5 PRIMARY INPIII INPIII 9 Y s a e 4 5 2 I o April 2,1968 D. o. NEDDENRIEP 3,376,553

DIAL CONTHOLLED AUXILIARY PLUGBOARD PANEL Filed April D, 1965 6sheets-Sheer I [40| f4025 f405 /404 f402 CARD CARD sELEcToRs cARD R RCARD CARD INPUT D D INPUT E E R I I I I I R D cEIvING c uT s 406 cAR REH E GATE cIRcuITs DATA coMPARAToR 403 coNTRoL BACK SIGNALS PLUGBOARDSOURCE REMovAaLE PLUGBDARD United States Patent O 3,376,553 DIALCONTROLLED AUXILIARY PLUGBOARD PANEL Donald 0. Neddenriep, Maple Glen,Pa., assigner to Sperry Rand Corporation, New York, N.Y., a corporationof Delaware Filed Apr. 5, 1965, Ser. No. 445,626 3 Claims. (Cl.S40-172.5)

ABSTRACT F THE DISCLOSURE The present device provides a removableplugboard for controlling a data processing system which has plug holestherein disposed to enable plug hub wires with jack plugs to be insertedtherethrough to mesh with protruding prongs on the back plugboard of thedata processing ma-chine. In addition there is a second level controlpanel on said removable plugboard which includes rotary switches andtoggle switches whose contacts are wired by jack plugs through certainof said plug hole positions in order that the mere setting of the dialeffectively relocates a plug hub wire so as to permit the selection of amemory address location without physically relocating the wires.

This invention relates to plugboard type control panels to be used withcard-handling, data processing equipment, and, more particularly, to asecond level control means which employs dial switches to alter thecontrols of the data processing equipment in conjunction with a rstlevel or principal plugboard device.

In certain plugboard-controlled, data processing systems, the addressesof information words, which can be held in the memory means of the dataprocessing system, are designated on the `plugboard control panel. Insuch data processing systems when the data storage locations of thememory are arranged according to rows and columns, the addressdesignations on the plugboard device accordingly are -designated as themost significant row and column positions and the least significant row`and column positions. In such card-handling, data processing systems,the information is read directly into the memory and the handling of thecards is accomplished by processing the information from memory andaccordingly generating controls. When such a system is used toaccomplish a card sorting operation, it becomes necessary to continuallychange the memory addresses since the card columns, upon which the sortsare made, have different memory addresses. Obviously, if the plugboardis wired to read multiple fields as most plugboards are, the necessityto continually change the wires of the address plug hubs is cumbersome,ineicient and very often leads to error.

Accordingly, the present invention provides a scheme to enable theoperator of a card-handling, plugboardcontrolled, data processingsystem, which can be used for a sorting operation, to readily select theaddress in the memory that corresponds to the card column upon which thesort is desired. In addition, there is provided a means foraccomplishing a sequence check and a further means to readily select aparticular card or cards from a deck of cards when such cards arematched against a particular multiple digit reference number.

It is an object of the present invention to provide an improvedplugboard control panel arrangement.

It is a further object of the present invention to provide an improvedplugobard control panel arrangement which will enable the operator toselectively choose memory addresses upon which a card sorting operationcan be accomplished.

3,376,553 Patented Apr. 2, 1968 It is a further object of the presentinvention to provide an improved plugboard control panel arrangementwhich will enable the operator to readily select the memory address of acard column, upon which a sequence check operation can be read.

It is a further object of the present invention to provide an improvedplugboard control panel arrangement which will enable the operator toselect a paritcular data character against which decks of cards may bematched to select only those cards which have the character.

In accordance with a feature of the present invention there is provideda secondary level control means which includes a plurality of dialswitches, the terminals of which are connected ultimately to the addressplug hubs on the principal plugboard.

In accordance with another feature of the `present invention there isprovided a plurality of single throw switches one each of whichrepresents a different bit of the digits which are normally handled bythe system.

The above mentioned and other features and objects of this inventionwill become apparent by reference to the following description taken inconjunction with the accompanying drawings wherein:

FIGURE l is a top view of the secondary control device, upon which thedials are mounted, including a cutaway to show the relationship betweenthe address plug hubs of the principal plug board and one of the dialdevices;

FIGURES 2a and 2b together are schematics of the primary levelplugboard;

FIGURES 3a and 3b are two schematic diagrams respectively showing thearrangement of the cards first and second sort passes.

FIGURE 4 shows a schematic pictorial of a plugboardcontrolledcard-handling data processor.

The present dial control plugboard arrangement finds great use with theUnivac Card Controller Device which is a device that handles cards bothin a collating and a sorting fashion, as well as data processing boththe information from said cards (which may be transmitted to someauxiliary data processor) and information recieved from some auxiliarydata processor. The Univac Card Controller Device is described in U.S.Patent Application 404,758, which application is assigned to theassignee of the present application. In a normal sorting operation, thecards are sorted in each pass through the machine according toinformation in one particular column, although field sorts can beaccomplished by the Univac Card Controller. It is well know that when adeck of cards is sorted on one column the operator ultimately wants thecards to be separated according to nine's, eights, sevens, etc. throughzeros, as well as rejects.

A single sorting operation is accomplished with the Univac CardController Device in two passes, i.e., by transporting the cards throughthe sorter operation twice for one breakdown into nine's, through zerosand rejects. This mode of operation can be best understood by examiningFIGURES 3a, 3b and 4.

FIGURE 4 is a schematic pictorial of a plugboardcontrolled cardhandling,data processor similar to the `Univac Card Controller Device mentionedabove. For the purposes of the present invention it suiices to say thatthe operation of the device shown in FIGURE 4 is such that cards areinserted into the card input positions 401 and 402. At these card inputpositions there are card hoppers which hold the cards and card feederswhich move the cards physically out of the input position past therespective card reader stations 403 and 404. The cards are thentransported through a number of chute selector devices 405. When one ofthese selectors is energized a card in that location is shunted into anassigned Card receiving chute such as the chutes 406.

Now if a card sorting operation is to take place information in thememory is compared aginst information in the cards. The manner in whichthis is effected is to wire certain memory location positions in theremovable plugboard device 407 which in effect acts to energize throughthe back plugboard 408 certain of the locations in the memory 409.Thereafter the information from the memory is transmitted back throughthe back plugboard 408 through the removable plugboard 407 to the datacomparator 410. As the cards pass under the card reader stations, theinformation on the card is read therefrom and transmitted through theback plugboard, through the removable plugboard into the card comparator410. At the time that there is a proper comparison, a signal istransmitted from the data comparator back through the back plugboard 408and removable plugboard 407 to the proper chute selectors to select thecorrect chute to cause the card to fall into the proper position. Thisoperation is explained in detail in the U.S. Patent Application Ser. No.404,758, mentioned earlier.

The deck of cards are initially put into the primary hopper 11 shown asInput Primary. The mechanism on the primary side transports the cards tothe common pocket and the three primary pockets. The cards are sorted sothat the zeros, ones, twos, and threes, fall into the primary one pocket13, while the fours, sixs, and eights fall into the primary two pocket15, and the tives, sevens, and nines fall into the primary three pocket17. The rejects fall into the common pocket 19. Although other schemesof operation can be set up, the mode of operation just describedconstitutes the first pass. Thereafter the cards are processed as can beseen in FIGURE 3b. The zeros, ones, twos, and threes are placed into theprimary input 11, while the fours, sixs, and eights are loaded into thesecondary input 21 first, and the fves, sevens, and nines are loadedinto the secondary input secondly. The rejects are removed from themachine. Both feeds of the card controller then become effective and thezeros are procesed to fall into the primary one pocket 13, the ones areprocessed to fall into the primary two pocket 15, the twos are processedto fall into the primary three pocket 17, the threes are processed tofall into the common pocket 19. On the secondary side, the fours andfives are processed to fall into the secondary three pocket 23, the sixsand sevens are processed to fall into the secondary two pocket 25, andfinally the eights and the nines are processed to fall into thesecondary one pocket 27. It should be noted that since the fours wereloaded into the secondary input ahead of the ves, they fall into thesecondary three pocket 23 ahead of the fives. And, in a similar fashion,the sixs fall into the secondary two pocket 25 ahead of the sevens andthe eights fall into the secondary one pocket 27 ahead of the nnes. Thislastdescribed operation constitutes the second pass.

After the second pass has been completed, the operator simply lifts thecards from the pockets 13, 1S, 17, 19, 23, 25 and 27 in that order andthe deck has been properly sorted zero through nine.

Examine now FIGURES 2a and 2b which `represent the schematic of theplugboard used in the Univac Card Controller Device. It will be notedthat along the bottom two rows of the plug hubs there are plug hubsdesignated R and C, and these plug hubs are further designated 2 through16. The memory used with the Card Controller is a sixteen by sixteenarray and hence there are sixteen row and sixteen column addresspositions. These plug hubs are designated operand address, mostsignificant location," and least signicant location." When plug wiresare inserted into these plug hubs the memory positions energized bythese plug hubs either receive or transmit information depending uponthe particular operation which is in effect. As mentioned above, insofaras the sorting operation goes, the information is read into the memorydirectly from the cards and the sorting operation is accomplished bycomparing the information from the memory against standard digits whichare either stored in memory or by using information as directlygenerated by the bit emitter (absent and present) 51.

Although the plugboard of FIGURE 2 could be wired in many different waysthe following, in general, would be a way to accomplish the sortingoperation. In Step 1 a transfer of the information to the D registercould be wired (plug hub 34) and at the same time Clear l and Clear 2plug hubs 35 and 36 would be wired to clear the memory. Also during Stepl the Read Primary" and Execute plug hubs 38 and 39 would be wired inorder to process a card through the reading station on the primary side.

Assuming for the moment that we are only doing the first pass andtherefore the primary side is reading the cards, the Step 1 change wouldbe wired to a selector which would be further wired to automaticallyadvance the control to Step 3, when Step 1 has been completed, As willbecome apparent, hereinafter, Step 2 is used to read the cards in theSecondary. During Step 3 the information which was read from the cardwould be transferred into a working storage position by once againwiring the transfer D plug hub 34. The location of the memory of theinformation read from the card (designated operand l) is selected bychoosing an operand 1 location through the dials of the secondary levelcontrol. The operand 2 location (the working storage) to which theinformation is transfered is selected by permanently wired positions onthe plugboard. It is at this point that the dial on the plugboard cornesinto play.

For instance, examining FIGURE l We find that if we were sorting oncolumn 30 of the card we would look at the memory locater 41, and wewould find that column 30 is located in memory row 2, memory column 14.Therefore, we would set the dial 42 at row 2 and the dial 43, whichrepresents the column, at location 14. The terminals of these dials arewired from the outputs of certain collectors, such as collectors 44, inFIGURE 2a, to the proper row and column positions 29. For instance, thewire from the terminal 2 of dial 42 would be wired through the output ofa collector, for instance, plug hub 4S to the row 2 plug hub 47. Anotherplug hub of that same collector, such as plug hub 48, would be wired tothe least significant plug hub positions 49. This is necessary becausethe most significant and least sig-nicant positions, when the system isonly dealing with one column, are the same positions. The operand l plughub, as connected for the third step, would be wired to the common ofthe dial so that there would be a circuit from operand l through thenumber 2 terminal of the dial to the row positions 47 and 49. The columnpositions operate in the same fashion, through a collector, and thedescription thereof does not appear to be necessary. In this way, therow and the column positions are readily chosen by the operator Vandduring Step 3 the information from that row and column position, inmemory, which has been read from the 30th column of the card, will betransferred into a working position of the memory.

Thereafter on Step 4 the read primary and execute plug hubs will bewired once again to transfer a second card through the read station. Theparticular device with which this plug board is used, has a waitingstation which holds two cards before it transfers either of them intothe stacker positions. Therefore as the second card is being transportedthrough the read station a decision can be made as to where the firstcard should be stacked.

Initially, in Step 5 the primary and secondary common stackers areselected so that in the event there is no further selection made all thecards will be transported into the common stacker and in the case whenthe secondary is being operated the cards will pass from both theprimary and the secondary feeds into the common stacker. In Step 6 theinformation from the working storage is read out to select the properstacker position. It will be noted in FIGURE 2b that there is a set ofplug hubs 51, labeled Bit Emitter Absent and Bit Emitter Present. Theseplug hubs emit signals indicating the presence or the absence of a bitfor each of the memory positions as each memory position is scanned. Thelocation of the particular memory position which is being scanned can berecognized by sampling the pulses from the address emitter plug hubs 53.

Accordingly, the working storage address (assume for instance that it isRow 7, Column 1 and therefore identified yas Plug Hubs S4 and 55), iswired to some ten combines. Now it should be understood that thecombines act as coincident gates. These combines are wired from theproper combination of absent and present bit emitter plug hubs whichrepresent the particular digits to be sampled. For instance, in anExcess-3 code, the bit emitter present plug hub l, 2, Y and X would bewired to the combine, while the bit emitter absent plug hubs 4 and 8would be wired to the combine. Accordingly, if there were a zero(110011) present, that particular combine, during the address time forRow 7, Column l, would provide an output from the combine plug hubs 56.During the first pass, the combines representing the zero, one, two andthree would be wired through a selector to the primary one stackerselect plug hub 57. In a similar fashion, the combines representing thedigits 4, 6, and 8 would be wired to the primary 2 stacker selector plughub 58, while the combine representing the digits 5, 7, and 9 would bewired to the primary 3 stacker selector 59. If the cards were notselected at all they would pass on into the primary common and would beidentified as rejects.

The cards would be processed for the second pass by transferring theswitch 60 shown in FIGURE l to Number Second, which stands for secondpass. This Type Sort switch 60 would energize the proper selectors sothat cards in the secondary would read as well as the cards in theprimary. Information from the cards in the secondary would betransferred to another Working storage area of memory, and the combineoutputs would be rerouted through selectors to energize the stackerselector plug hubs S1, S2, and S3 as well as the P1, P2 and P3 plughubs. In the foregoing manner, the first and second passes of the sortcan be made by simply setting the dial 42 and the dial 43 in accordancewith the selected chart 41 and then altering the dials as the sortpasses continue to be made for columns along the card. It should beremembered that the switch 16 has to be transferred from Number First toNumber Second, to accomplish the first and second passes.

In another mode of operation, if the operator wants to accomplish asequence check, i.e., find out if the cards which are passing throughthe system are in proper sequence in any particular column, normally onthe column last sorted, he first sets switch 63 to ON. Thereafter, hesets the dial 61 to the row position and dial 62 to the column positionwhich represents the card column to be sequence checked as found on theidentilication chart 41. In FIGURE l dial 61 is shown on row 3 and dial62 on column 10, which would mean that the operator is doing a sequencecheck on card column 42. Switches 61 and 62 can be readily wired to readthe fields that have been sorted to date starting at the setting of theswitches 61 and 62.

As mentioned above in order to accomplish the sequence check, thesequence check switch 63 must be thrown to the ON side which choosescertain selectors and enables the information from the second card to betransferred to a working storage so that it can be compared with theinformation from the first card. The compare plug hub 66 is wired toeffect a comparison and the compare results are also wired with only theless-than plug hub 65 being effective to halt the machine.

When the system is going to examine a deck of cards for a particulardata character, the dial 60 is turned to character and the selectcharacter switches 64 are set titl with the proper code identificationof the character being sought. As the information from the cards is readand transferred to a Working storage once again the bit-absent emitterand the bit-present emitter are wired to combines along with the addressemitter for a particular column such as the column selected on dials 42and 43. When a combine is fully conditioned the output thereof selects acorresponding stacker select location into which the cards bearing thecharacter are to be directed.

It becomes apparent from the foregoing description that the dial controland the switch control arrangement of the present invention as depictedin FIGURE 1 enables the operator to readily control the column uponwhich information is to be considered to accomplish either a sort, asequence check, or a character examination.

While I have described above the principles of my invention inconnection with specific apparatus, it is to be clearly understood thatthis description is made only by way of example and not as a limitationto the scope of my invention as set forth in the objects thereof and theaccompanying claims.

The embodiments of the invention in which an exclusive property orprivilege is claimed are defined as follows:

1. A control panel to be used with a card-handling, data processor whichhas a memory means whose memoryr locations are arranged according torows and columns and whose memory locations are electrically connectedto a back plugboard which has protruding prongs from each locationthereof, said processor further having a source of control signalsconnected to said back plugboard with protruding prongs assigned tospecific locations therefor comprising in combination:

(a) principal plugboard means having a plurality of apertures therein toreceive jack-like connectors of plugboard wires;

(b) said principal plugboard means constructed to tit with matching onesof said protruding prongs on said card-handling, data processor;

(c) certain of said apertures being designated as row position memoryaddress apertures and column position memory address apertures, saidapertures disposed to position the jack-like connectors they receive toengage said protruding prongs assigned to the row and column positionsof said memory, and being used to select information words which arestored in said memory locations;

(d) certain others of said apertures being designated as control signalapertures and disposed in said principal plugboard to position saidjack-like connectors they receive to engage said protruding prongsassigned to said control signal positions to provide output signalsrespectively in response to input signals applied thereto;

(e) second level signal control means having at least tirst and seconddial means respectively connected to said row and column addressapertures through said control signal apertures, one of said dial meansconnected to individually select said row position apertures and saidsecond dial means connected to individually select said column positionapertures.

2. A control panel to be used with a card-handling, data processor whichhas a memory means whose memory locations are arranged according to rowsand columns and whose memory locations are electrically connected to aback plugboard which has a protruding prong for each location thereof,said processor further having a source of control signals connected tosaid hack plugboard which has a protruding prong for each of saidcontrol signal locations, comprising in combination:

(a) principal plugboard means having a plurality of apertures therein toreceive jack-like connectors of plugboard wires;

(b) said principal plugboard means constructed to fit with matching onesof said protruding prongs on said card-handling, data processor;

(c) certain of said apertures being designated as row position memoryaddress apertures and column position memory address apertures anddisposed in said principal plugboard to position said jack-likeconnectors which they receive to engage said protruding prongs assignedto said row and column positions of said memory, and being used to routesignals to select information words which are stored in said memorylocations; each of said information words in memory capable of beingaddressed according to its most significant column position addressaperture, most significant row position address aperture, leastsignificant column position address aperture and least significant rowposition address aperture;

(d) certain others of said apertures being grouped as collectorapertures and disposed in said principal plugboard to position saidjack-like connectors which they receive to engage said protruding prongsassigned to said collector aperture positions and being furtherdesignated as input and output collector apertures, means connected tosaid last-mentioned apertures to enable an address selection signal toenter said input collector aperture and then be transmitted from atleast one of said output collector apertures;

(e) second level signal control means having at least rst and seconddial means respectively connected to said row and column addressapertures through said collector apertures, one of said dial meansconnect through an associated group of said collector apertures toindividually select the row position apertures and said second dialmeans connected through an associated group of said collectors toindividually select the column position apertures.

3. A plugboard device to control a cardhandling, data processor whichhas a memory means whose memory locations are arranged according to rowsand columns, and which has first and second card transport means withcircuitry therein to read information from said first card transportmeans into particular locations in said memory and from said second cardtransport means into other locations in said memory, comprising incombination:

(a) principal plugboard means having a plurality of apertures therein toreceive jack-like connectors of plugboard wires;

(b) said principal plugboard means constructed to t with matchingconnectors on said card-handling data processor;

(c) certain of said apertures being designated as row position memoryaddress apertures and column position memory address apertures and beingused to route signals to select information words which are stored insaid memory locations, each of said information Words in memory capableof being addressed through said principal plugboard means by a fourpoint address designation as follows, most significant column positionaperture, most significant row position aperture, least significantcolumn position aperture, and least significant row position aperture;

(d) others of said apertures being grouped as collector apertures anddisposed in said principal plugboard to position said jack-likeconnectors which they receive to engage said matching connectorsassigned to said collector aperture positions and being furtherdesignated as input and output collector apertures to enable with theuse of additional circuitry means an address selection signal to entersaid input collector aperture and then be transmitted from at least oneof said output collector apertures;

(e) yet others of said apertures being designated as selector aperturesto provide with the use of additional circuitry means alternatively atleast first and second output signals in response to an input signal;

(f) second level signal control means having at least first and seconddial means respectively connected to said address apertures through saidselector apertures and through said control apertures, one of said dialmeans connected through said selector apertures and said collectorapertures to the row position apertures which represent the rowpositions read from cards in both the second card transport and thefirst card transport, and second dial means wired through said selectorapertures and said collector apertures to the column position aperturesrespectively representing the column positions of cards read in bothsaid first and second card transport means.

References Cited UNITED STATES PATENTS 2/1964 Eckert et al. 23S-160ROBERT C. BAILEY, Primary Examiner.

R. M. RICKERT, Assistant Examiner.

